Experiment timeline
FPGA experiment timing visualisation: a chart viewer for DAC and TTL output channels against time.
Overview
quatm/GUI/entries/experiment_timeline.py provides the experiment timeline (Timeline): it
loads an experiment timing JSON file (experiment.json), draws the variation of each DAC/TTL
output channel over time as step subplots, and provides a checkbox panel of output channels to
decide which curves are visible, which makes experiment timing logic easier to debug and verify.
Components
| Component | Description |
|---|---|
Timeline | Timeline viewer main window: file loading, plotting and channel control |
TimelinePlotter | Timing visualisation widget: plots the state of each active output against time |
SelectorWidget | Output-channel checkbox panel: select all / select none decides the visible curves |
Key methods (Timeline)
| Method | Description |
|---|---|
load_file | Loads and parses the timing JSON, constructs the time series and refreshes the channel selector |
plot_experimental_sequence | Creates a separate subplot for each output according to the channel selection and draws a step plot |
decode_ttl_bitmask | Splits the 32-bit TTL bitmask into set/clear commands for the individual channels |
construct_time_sequences | Converts the step-wise timing into times/vals sequences organised per channel |
reverse_device_db_transformation | Device-database reverse transformation: maps internal names back to readable names (including the gauge calibration table) |
Usage
from quatm.GUI.entries.experiment_timeline import Timeline
tl = Timeline()
tl.load_file("experiment.json") # load a timeline file and plot it
tl.show()