Timeline Viewer

FPGA experiment timing visualisation: a step-plot viewer of the DAC/TTL output channels over time.

Overview

quatm/GUI/entries/experiment_timeline.py provides the timeline viewer (Timeline): it loads an experiment-timing JSON file (experiment.json), plots the variation over time of each DAC/TTL output channel as a step subplot, and the output-channel check panel determines which curves are visible; it is used to debug and verify the experiment timing.

Components

ComponentDescription
TimelineTiming-viewer main window: file loading, plotting and channel control
TimelinePlotterTiming-visualisation widget: draws the state of every output in use over time
SelectorWidgetOutput-channel check panel: select all / select none

Key methods (Timeline)

MethodDescription
load_fileLoads and parses the timing JSON, builds the time series and refreshes the channel selector
plot_experimental_sequenceCreates an individual subplot per output according to the channel selection and draws a step plot
decode_ttl_bitmaskSplits a 32-bit TTL bitmask into set/clear commands for the individual channels
construct_time_sequencesConverts the step-wise timing into times/vals sequences organised per channel
reverse_device_db_transformationReverse device-database transformation: maps internal names back to readable names

Usage

from quatm.GUI.entries.experiment_timeline import Timeline

tl = Timeline()
tl.load_file("experiment.json")   # load the timing file and plot it
tl.show()

For a fuller description see Timing browser.